1. Technical Field
This disclosure relates to semiconductor fabrication and more particularly, to a hard mask and etch stop layer structure and a method for forming the hard mask and etch stop layer structure such that that the hard mask is easily removed from underlying layers during semiconductor fabrication processing.
2. Description of the Related Art
Etching of noble metals, such as platinum (Pt) is difficult due to the lack of highly volatile etch by-products at conventional processing temperatures (e.g., &lt;100.degree. C.). Etching of noble materials needs an appropriate etch mask or hard mask which can provide adequate resistance to harsh noble material etching processes.
The use of high wafer temperature processes, such as the temperatures developed during plasma etching, need careful selection of hard mask materials. The mask is to be made of a material that is compatible with the etch process. In addition, the mask material should not lead to stress in the underlying films and must be easy to remove after completion of electrode etch before subsequent depositions.
In dynamic random access memories (DRAM), which employ stacked capacitors, a bottom electrode of the stacked capacitors is often formed from Pt. In the prior art, a single layer oxide mask made up of TEOS oxide has been employed as a hard mask for forming the bottom electrode. Removal of this hard mask after Pt etching is difficult due to the low selectivity of TEOS oxide to other oxides which may be present including layers below the bottom electrode.
Therefore, a need exists for a hard mask layer employed for etching materials, particularly noble materials, which is capable of being easily removed after the etching process.